Basic constant current dummy load using an Op Amp and a by-passing MOSFET is very easy to build and had been made quite popular following Dave’s video on EEVBlog. I happened to have an old aluminum hard disk cooler case collecting dust. The die-cast aluminum case is relatively thick, making it an excellent heat sink. So I thought why not use it to build a dummy load myself?

The circuit I am using is pretty standard, although it has been modified a little bit from what you saw in Dave’s video and I will explain a little bit here.

The Op Amp I used is a general purpose LM358N. A simple Zener diode is used to generate a voltage reference at around 5V. This reference voltage is then buffered by IC1A to provide the voltage reference to the Op Amp that drives the by-passing MOSFET. The reference voltage range along with the current-sensing resistor value (R3) determine the current sink capability. In my case, the desired maximum current of this load is 10A. So I chose 5V as the voltage reference with a 0.5 Ohm current sensing resistor. A benefit of using 5V is that this circuit can be easily controlled from an MCU. But for now, the current is controlled by a 10K multi-turn trimpot.

The buffered voltage reference is then passed into the current sink formed by the second Op Amp and the MOSFET. The feedback loop of the Op Amp ensures that the voltage drop across the current sensing resistor is the same as the reference voltage coming from IC1A. R1, R2 and C1 form a compensation network to ensure stability.

The choice of the by-passing MOSFET largely depends on the output current requirements and the Vgs-Ids characteristics. While you typically want to use a logic-level MOSFET if the gate needs to be controlled from an MCU output, using a logic-level MOSFET is not strictly necessary. It all depends on what is the pass-through current requirement at the maximum attainable gate voltage (in this case, it is 5V). The MOSFET I used is Fairchild’s RFP50N06. Even though it is not a logic-level MOSFET, it can deliver more than 20 amps saturation current at a Vgs of 5V which is much more than our designed maximum current (10A).

Constant Current Dummy Load
Constant Current Dummy Load

If we take the maximum allowed power dissipation of RFP50N06 into consideration, we will find that Vds is limited to roughly 12V at the highest load current. In reality though, the maximum Vds allowed for a single MOSFET is likely to be much lower than 12V. So in my design, two RFP50N06 are paralleled (not shown in schematics) so that the maximum allowed power dissipation can be increased.

The following picture shows the above mentioned circuit built on a protoboard. The board mounts nicely inside the hard drive cooler aluminum case. The MOSFETs are mounted on the sides of the interior case walls using the existing mounting holes. The original hard drive cooler has a cooling fan mounted towards the front, which provides some airflow to help cooling down when under load.

Dummy Load 1
Dummy Load 1

Here is what this constant current load looks like when everything is assembled together.

Dummy Load 2
Dummy Load 2
Dummy Load 3
Dummy Load 3

Because LM358N is not a rail-to-rail operational amplifier, the load current will not go all the way down to 0 when the input voltage is set to zero. Depending on the characteristics of the MOSFET, this current could range from a few milli-amps up to 100 mA. For RFP50N06, the minimum load current is measured at around 50 mA which should be small enough for most uses. If much lower minimum current is required, a better spec’d and preferably a rail-to-rail Op Amp can be used. Another thing to keep in mind is that the input bias current of the Op Amp affects the linearity of the current-setting, but this should only be of a concern if the circuit is used as a low current (e.g. in the micro-Amp range) load. In that case, you will need to pick an Op Amp with a much lower input bias current.

Be Sociable, Share!

34 Thoughts on “Constant Current Dummy Load In an HDD Cooler”

    • What do you mean “how it interfaces to the case”? The HD cooler has mounting holes for the hard drive, I just used those holes to secure the board.

      • I meant for the “MOSFET Fairchild’s RFP50N06.” I thought you were using the case as the heatsink for the mosfet ? How are you interfacing the mosfet to the case ?

        • Oh, the MOSFETs are mounted on the sides, not the bottom. If you follow the wires (blue, black, red) you will see that they are mounted one on each side. Again, the existing mounting holes of the case are used.

          • Now I see ! There are two groups of four holes one with a nut and bolt and this is where the mosfet is secured. Any thermal paste used ?

          • Yep, that’s where I mounted one of the MOSFETs. I used two in parallel and the other one is mounted on the other side. I used thermal paste, if the load is small then you can just use one MOSFET.

    • If you have decent cooling and balance all the parallel MOSFETs, then you should be able to get to the desired range. But keep in mind that at 24V 25A the worst case power dissipation is 600W!

        • Not sure how easy it is to balance 10 MOSFETs, regardless you would still need a very large heatsink to dissipate the power whether you use 2 MOSFETs or 10 MOSFETs.

          While MOSFETs are in general easier to parallel due to the positive Rds coefficient, it still can be quite tricky in high-power situations. So having 10 MOSFEFs in parallel is not a easy task. I’d recommend you take a look at this application note ( from Renesas.

          That said, if you can make sure that the load will never be shorted and keep Vds low, you can just use a single MOSFET in your situation, as long as Vds*I stays within the maximum power dissipation of your MOSFET.

  • hi, why would you need an op-amp to generate output and feed it in into another op-amp?

    what would happen if you feed a voltage into the non-inverting input of the op-amp and use that output to feed into the gate of the mosfet?


    • The op-amp is used to buffer the voltage from the pot so that the input to IC1B remains linear. If you connect it directly to IC1B without this buffer, the adjustment will become quite nonlinear as the input impedance to IC1B is quite low.

      • I dont get it. If an opamp is used in inverting config, input resistance is depends on the input resistance(Ri//Rif), but here the input from the zener reference can be connected to opamp with mosfet in the feedback path directly because the non inverting terminal has very high input resistance.

      • I don’t get it, too. Why should the input impedance of inverting input on IC1B be lower than on IC1A? Aren’t those two identical opamps?

  • 5V voltage drop over the resistor at 10A, that is 50W power dissipation only on the Resistor, right? You need a really big one.

  • Is R2 in the compensation network critical or will 510R suffice? 510R is a heck of alot easier to find than 500R

    • 510 will be fine. The values of components in the compensation network are highly dependent on a number of factors so it is best to experiment with different values should oscillation occur.

  • Just finished building this. At 3.8V/1A, I was getting 400 mv P-P 75kHz osc at the gate with the specified resistors and cap. I put in a resistor test box for the 500 ohm resistor but I could not find a value that stopped the oscillations. I took one of the MOSFETs out of the circuit and found 1500 ohms stopped the oscillation. The load worked ok then. I tried it up to 3.8V/5A.

    Can you suggest what is going on?



    • Try increase value of the gate resistor (100 ohm). Also you might want to use a fixed resistor rather than a resistor box as the long wires can affect the stability of the circuit.

      • As drawn your circuit has the 1n caps on the wrong side of the the 500ohm resistor. This means the feedback compensation isn’t right and some units might oscillate.

        BTW: paralleling MOSFETs in linear mode isn’t a good thing. You can get away with it if you use MOSFETs from the same batch. Imagine one MOSFET with Vgs_off at 2V and the other with Vgs_off at 4V. The 2V Vgs_off unit will be supplying all the current and the 4V Vgs_off device might as well not be there!

        One way to minimize mismatch at higher currents is to use separate source resistors for each MOSFET, twice the value of what you have. You then need to form a resistive summer to add the sensed currents of each: split the 500ohm compensation resistor into two 1k resistors, each 1k connects to a source resistor and both 1ks then connect to the opamp -ve input. The down side of this method is if the extent of mismatch is large one device carries twice the current anyway and the voltage drop across Rs is twice as high.

        It is best to use a separate opamps for each MOSFET.

        The minimum current issue is likely to be due to opamp offsets, you could put a nulling circuit in there.

  • Nice job!

    My implementation will have about 6″ or so of wire between the opamp and gate. I noticed between this version and your high power version the 1nf cap is in a different place. Here it’s right at the op-amp pins, were as on the high power one side is at opamp output and other is at the mosfet (opposite side of the 500 ohm resistor). Does it matter? If both side of cap are right at the mosfet, will it be more effective since my leads are a little longer?

  • Hi, I have a couple of questions regarding the circuit.

    1. How does the circuit handle ground noise voltage (in simulation I used a voltage source of 50mV – 200mV between current sense resistor and GND) ? My simulation results gave me reduced current with higher GND voltage. If this happens in the field, how to isolate the circuit from GND noise from current path ?

    2. How does the circuit behave under no Input Supply Source at the Drain of the MOSFET but the other circuitry is powered ? Again, in my simulation and a small test circuit I built, what I observed was that the current sense feedback circuit would sense no current flow through the resistor and hence the GATE drive circuit turns the MOSFET ON instead of operating it in linear mode. When power is applied to the Drain of the MOSFET, the current output goes in to oscillations. Have you experienced this ? If yes, is there a fix for the same ?


  • Hi Kerry,

    I was thinking about that problem of load current being not adjustable down to zero because of the op-amp characteristics. Would it be fixed by providing negative voltage to the GND rail of the LM358? It would be relatively easy to make a simple negative charge pump from just few caps and diodes and a 555 in astable configuration (or PWM from a uC). I will test that later, when I have finished my other ongoing projects.

    • You will still have some offset voltage even with a negative rail, but the result should be better. Alternatively, you could switch to a rail-to-rail opamp.

      • Okay, thanks for the answer. Now I finally got time to test this thing and here’s what I found out. At first the minimum load current was about 5 mA, but when introducing -3V to the negative rail I got it down to 3 µA. Not bad! :) The op-amp I used is just a regular LM324 which goes very close to the lower rail.

        I’m about to build a NiMH battery discharger based on this circuit, but will have an AVR to control the load current and to stop it in time to prevent deep discharging.

  • Reopening a new thread…
    I am trying to create a 28VDC dummy load capable of handling up to 2600W.

    Any insight on component choice and how to incorporate redundancy to allow the FETs to current share?

    Thanks so much!

  • Is that capacitor c1 value right? 1n? Lowest i could find on the internet is 100nF. Currently im using 1uF (lowest value i had at home) and its not working at all.

Leave a Reply

Your email address will not be published.